1. Field of the Invention
The present invention relates to tunneling field effect transistors (TFETs), and more particularly to tunneling field effect transistors formed by compound semiconductors on a silicon substrate and methods for fabricating the same.
2. Description of the Related Art
These days, it is aiming for a goal that not only switch devices, but also various kinds of optical devices are integrated on a silicon substrate due to cost-effectiveness.
So far, the optical devices in many cases are basically fabricated with direct bandgap compound semiconductors, but the various kinds of switch device of peripheral circuits for driving the optical devices are fabricated on a silicon substrate. Thus, there is a problem that an optical integrated system must be fabricated through complicated processes.
Namely, the problem has occurred in the fabrication of the optical integrated system through the separation process for an optical device forming region and a peripheral circuit forming region.
To solve the problem, it is needed to develop new switch devices and processes for forming simultaneously the peripheral circuits in a fabrication process of the optical devices.
Until now a MOSFET is conventionally used as a switch device which is essentially needed not only in the optical integrated system, but also in various kinds of system having electrical circuits. However, it is reached to limit because of needs of a higher effective device and a smaller device with size decreased gradually by increasing integrity degree. And an alternative device is being needed.
Namely, as mentioned in Korean Patent No. 10-1058370, the conventional MOSFET has a basic problem of a considerable decrease in performance in case of a low driving voltage due to the physical limit, i.e., a subthreshold swing (SS) of MOSFET cannot be lower than 60 mV/dec at room temperature.
However, a tunneling field effect transistor controls flows of electrons or holes by a tunneling mechanism which differs from a thermionic emission of the conventional MOSFET, and a finer change of input voltage (driving voltage) can bring on a larger change in output current.
It is suggested that a change of ON/OFF states is very rapidly occurred according to the change of gate voltage and also it means that a low subthreshold swing (SS) is possible.
And because it is expected that a normal operation is possible in condition of very low driving voltage as like as below 1V, a tunneling field effect transistor can consume a few power and obtain a performance similar to a conventional MOSFET. Therefore, a tunneling field effect transistor is hoped to a switch device with high energy efficiency and a semiconductor device which can substitute for a conventional MOSFET.
A tunneling field effect transistor which basically differs from a conventional MOSFET, as shown in FIG. 1, has an asymmetric structure of a source region 200 and a drain region 400 formed by a dopant with an opposite conductive type each other on both ends of a channel region 300.
For example, in n channel TFET case, a source region 200 is formed as P+ region and a drain region 400 is formed as N+ region on both ends of a channel region 300 in P-type or intrinsic silicon-on-insulator (SOI) substrate on a buried oxide layer 100. Here, the P+ region and the N+ region are meant as a heavy doped P-type layer and a heavy doped N-type layer, respectively (hereinafter, the same is used).
In the structure of FIG. 1, if a driving voltage is applied to a gate electrode 600 on a gate insulator 500 and a reverse bias voltage is applied between a source region 200 and a drain region 400 respectively, an abrupt junction with a sharp energy band slope is formed between a channel region 300 and a source region 200 as shown in FIG. 2, and a driving current (ION) is flowed by a quantum mechanical tunneling.
However, because a driving current of a tunneling field effect transistor is induced by a tunneling phenomenon, current value lower than that of MOSFET is a problem.
Thus, a first technological problem to completely substitute a tunneling field effect transistor for a MOSFET is to be increasing a driving current (ION) to the value similar to that of a driving current of MOSFET.
Also, because the structure of a tunneling field effect transistor is activated by applying a reverse bias voltage to a p-i-n diode with a gate, a leakage current is basically less than a MOSFET, but an ambipolar operation is possible. As shown in FIG. 3, when a driving voltage of a gate is changed from positive to negative (namely, when OFF voltage is applied), a place in which a tunneling is occurring is changed from P+ region to N+ region and the leakage current can be increased because of the tunneling at an unintended region. It is considered as a problem for decreasing ON/OFF current ratio.
Specifically, it increases the consumption of a standby power in portable electronic devices. And so a second technological problem to completely substitute for a MOSFET is urgently minimizing the OFF current.
According to circuit designs, many transistors having various threshold voltages are needed. But a conventional tunneling field effect transistor, as shown in FIG. 1, is formed on a SOI substrate. And so there is a problem that it is difficult to control easily the threshold voltage by a boron ion implantation as like as in a bulk MOSFET.
That is a third technological problem to completely substitute a tunneling field effect transistor for a MOSFET.
To solve the first technological problem, U.S. Pat. No. 7,947,557 and International Publication No. WO2010/078054 disclose a source region (P+ region) material that has a bandgap less than that of silicon and Korean Patent Publication No. 10-2011-0024328 discloses an abrupt junction with a rapid band slope by a high-k dielectric layer. In addition, Korean Patent No. 10-1058370 discloses a trap layer formed between channel and source regions for increasing a driving current.
Korean Patent Publication No. 10-2011-0024328 and Korean Patent No. 10-1058370 disclose methods fabricated with silicon, but there is a difficult problem that tunneling field effect transistors cannot be simultaneously formed with optical devices fabricated basically with compound semiconductors.
U.S. Pat. No. 7,947,557 discloses a fabricating method that allows it to form with a compound semiconductor substrate, but there is a problem that the price of the compound semiconductor substrate is much higher than that of a silicon substrate.
International Publication No. WO2010/078054 discloses a source material which is InAs class materials with a bandgap less than that of silicon for increasing a tunneling current and detailed embodiments of III-V compounds (e.g., InGaAs and GaAsSb). But a lattice constant of InAs class materials is 6.06 Å and InGaAs and GaAsSbn disclosed as detailed embodiments have 5.87 Å lattice constant similar to that of InP. Therefore, the lattice constants of these materials have considerable differences from 5.43 Å lattice constant which is the lattice constant of silicon, and have a problem that it does not allow to grow the materials on a silicon substrate for forming a device. Thus, the compound semiconductor substrate with high price should be used as like as U.S. Pat. No. 7,947,557.
To solve the second technological problem, US Patent Publication No. 20080224224 and Korean Patent Publication No. 10-2011-0024328 disclose a separating method which does not overlap a gate to anyone of P+ region and N+ region, but it cannot be accepted as a preferable solution because of the large loss of area induced by the separation.
Also, to solve the third technological problem, recently, it is mainly achieved by changing gate material and controlling work function of the gate material.
In case of the method, it has some problems that a fabrication process is very complex because gate materials had to differ from each other as much as the number of switch devices to obtain different threshold voltages on one substrate and that the existence of gate material having a required work function is also not guaranteed.
Specifically, in case that peripheral circuit is formed simultaneously with optical device fabrication process, the process is becoming much more complex. Thus, new method is needed to shift easily the threshold voltage of each device.
The present invention proposes to solve the problems of the conventional technology and, specifically, the objective is to provide compound tunneling field effect transistors integrated on a silicon substrate and methods for fabricating the same for simultaneously forming peripheral circuit in optical device fabrication process on a silicon substrate and for solving the first through third technological problems required to completely substitute for conventional MOSFETs.